/* Copyright (c) 2025 Beijing Semidrive Technology Corporation
 * SPDX-License-Identifier: Apache-2.0
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 * http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */
/** *****************************************************************************************************
 * \file     Mcal_Cache.c                                                                               *
 * \brief    This file contains DMA MCAL driver.                                                        *
 *                                                                                                      *
 * <table>                                                                                              *
 * <tr><th>Date           <th>Version                                                                   *
 * <tr><td>2024/07/02     <td>1.0.0                                                                     *
 * </table>                                                                                             *
 *******************************************************************************************************/
#ifdef __cplusplus
extern "C" {
#endif
/********************************************************************************************************
 *                                      Include header files                                            *
 *******************************************************************************************************/
#include "Mcal_CacheAsm.h"
#include "Mcal_Cache.h"
/********************************************************************************************************
 *                                 Private Macro definition                                             *
 *******************************************************************************************************/
/** \brief  Cache Status. */
#define DCACHE_DISABLE                                                    ((uint8)(0x0U))
/** \brief  Cache Mask Bit. */
#define DCACHE_MASK                                                       (2U)
/********************************************************************************************************
 *                                  Private Function Declarations                                       *
 *******************************************************************************************************/
MCALLIB_LOCAL uint8 Mcal_CacheStatus(void);
/********************************************************************************************************
 *                                  Global Function Declarations                                        *
 *******************************************************************************************************/
#define MCALLIB_START_SEC_CODE
#include "McalLib_MemMap.h"
/** *****************************************************************************************************
 * \brief This function provide a interface enable cache.
 *
 * \verbatim
 * Syntax             : Mcal_CacheEnable
 *
 * Service ID[hex]    : 0x00
 *
 * Sync/Async         : Synchronous
 *
 * Reentrancy         : Non reentrant
 *
 * Parameters (in)    : cacheType - cache type indicate i-cache or d-cache
 *
 * Parameters (inout) : None
 *
 * Parameters (out)   : None
 *
 * Return value       : None
 *
 * Description        : cache enable interface, user can select which cache type enabled include
 *                      i-cache/d-cache/i&d cache
 * \endverbatim
 * Traceability       : SWSR SWSR_LIB_003 SWSR_LIB_014
 *******************************************************************************************************/
void Mcal_CacheEnable(const Mcal_CacheTypes cacheType)
{
    /* ----- Implementation ----------------------------------------------- */
    Mcal_ArchEnableCache((uint32)cacheType);
}
/** *****************************************************************************************************
 * \brief This function provide a interface disble cache.
 *
 * \verbatim
 * Syntax             : Mcal_CacheDisable
 *
 * Service ID[hex]    : 0x01
 *
 * Sync/Async         : Synchronous
 *
 * Reentrancy         : Non reentrant
 *
 * Parameters (in)    : cacheType - cache type indicate i-cache or d-cache
 *
 * Parameters (inout) : None
 *
 * Parameters (out)   : None
 *
 * Return value       : None
 *
 * Description        : cache disable interface, user can select which cache type disable include
 *                      i-cache/d-cache/i&d cache
 * \endverbatim
 * Traceability       : SWSR SWSR_LIB_004
 *******************************************************************************************************/
void Mcal_CacheDisable(const Mcal_CacheTypes cacheType)
{
    /* ----- Implementation ----------------------------------------------- */
    Mcal_ArchDisableCache((uint32)cacheType);
}
/** *****************************************************************************************************
 * \brief This function service to flush cache.
 *
 * \verbatim
 * Syntax             : Std_ReturnType Mcal_FlushCache
 *                      (
 *                          uint32 Address
 *                          uint32 size
 *                      )
 *
 * Service ID[hex]    : 0x0B
 *
 * Sync/Async         : Synchronous
 *
 * Reentrancy         : Reentrant
 *
 * Parameters (in)    : address - Start address.
 *                      size    - Buffer size.
 *
 * Parameters (inout) : None
 *
 * Parameters (out)   : None
 *
 * Return value       : None
 *
 * Description        : This function service to clean and then invalidate cache memory.
 * \endverbatim
 * Traceability       : SWSR_MCALLIB_018 SWSR_MCALLIB_019 SWSR_MCALLIB_039 SWSR_MCALLIB_047 SWSR_MCALLIB_049 SW_SM006
 *******************************************************************************************************/
Std_ReturnType Mcal_FlushCache(uint32 address, uint32 size)
{
    /* ----- Local Variables ---------------------------------------------- */
    Std_ReturnType errorId = (Std_ReturnType)E_OK;
    uint8 cacheStatus;

    /* ----- Development Error Checks ------------------------------------- */
    cacheStatus = Mcal_CacheStatus();

    /* #10 Check input parameters for plausibility */
    if (0x0U == cacheStatus)
    {
        errorId = MCALLIB_E_CACHE_UNENABLE;
    }
    else if (0U == size)
    {
        errorId = MCALLIB_E_PARAMS;
    }
    else
    {
        /* ----- Implementation ----------------------------------------------- */
        /* #20 Flush cache with specified address and size *//* PRQA S 0326 1 */
        Mcal_CleanInvalidateCacheRange((const void *)address, size);
    }

    return errorId;
}
/** *****************************************************************************************************
 * \brief This function service to invalidae cache.
 *
 * \verbatim
 * Syntax             : Std_ReturnType Mcal_InvalidateCache
 *                      (
 *                          uint32 address
 *                          uint32 size
 *                      )
 *
 * Service ID[hex]    : 0x0C
 *
 * Sync/Async         : Synchronous
 *
 * Reentrancy         : Reentrant
 *
 * Parameters (in)    : address - Start address.
 *                      size    - Buffer size.
 *
 * Parameters (inout) : None
 *
 * Parameters (out)   : None
 *
 * Return value       : None
 *
 * Description        : This function service to read new data from RAM or ROM memory to cache.
 *
 * \endverbatim
 * Traceability       : SWSR_MCALLIB_018 SWSR_MCALLIB_019 SWSR_MCALLIB_040 SWSR_MCALLIB_047 SWSR_MCALLIB_049 SW_SM006
 *******************************************************************************************************/
Std_ReturnType Mcal_InvalidateCache(uint32 address, uint32 size)
{
    /* ----- Local Variables ---------------------------------------------- */
    Std_ReturnType errorId = (Std_ReturnType)E_OK;
    uint8 cacheStatus;

    /* ----- Development Error Checks ------------------------------------- */
    cacheStatus = Mcal_CacheStatus();

    /* #10 Check input parameters for plausibility */
    if (0x0U == cacheStatus)
    {
        errorId = MCALLIB_E_CACHE_UNENABLE;
    }
    else if (0U == size)
    {
        errorId = MCALLIB_E_PARAMS;
    }
    else
    {
        /* ----- Implementation ----------------------------------------------- */
        /* #20 Invalidate cache with specified address and size *//* PRQA S 0326 1 */
        Mcal_InvalidateCacheRange((const void *)address, size);
    }

    return errorId;
}
/** *****************************************************************************************************
 * \brief This function service to clean cache.
 *
 * \verbatim
 * Syntax             : Std_ReturnType Mcal_CleanCache
 *                      (
 *                          uint32 address
 *                          uint32 size
 *                      )
 *
 * Service ID[hex]    : 0x0D
 *
 * Sync/Async         : Synchronous
 *
 * Reentrancy         : Reentrant
 *
 * Parameters (in)    : address - Start address.
 *                      size    - Buffer size.
 *
 * Parameters (inout) : None
 *
 * Parameters (out)   : None
 *
 * Return value       : None
 *
 * Description        : This function service to write cache memory data to RAM memor
 *
 * \endverbatim
 * Traceability       : SWSR_MCALLIB_018 SWSR_MCALLIB_019 SWSR_MCALLIB_042 SWSR_MCALLIB_047 SWSR_MCALLIB_049 SW_SM006
 *******************************************************************************************************/
Std_ReturnType Mcal_CleanCache(uint32 address, uint32 size)
{
    /* ----- Local Variables ---------------------------------------------- */
    Std_ReturnType errorId = (Std_ReturnType)E_OK;
    uint8 cacheStatus;

    /* ----- Development Error Checks ------------------------------------- */
    cacheStatus = Mcal_CacheStatus();

    /* #10 Check input parameters for plausibility */
    if (0x0U == cacheStatus)
    {
        errorId = MCALLIB_E_CACHE_UNENABLE;
    }
    else if (0U == size)
    {
        errorId = MCALLIB_E_PARAMS;
    }
    else
    {
        /* ----- Implementation ----------------------------------------------- */
        /* #20 Clean cache with specified address and size *//* PRQA S 0326 1 */
        Mcal_CleanCacheRange((const void *)address, size);
    }

    return errorId;
}
/** *****************************************************************************************************
 * \brief This function return the d-cache status.
 *
 * \verbatim
 * Syntax             : Mcal_CacheStatus
 *
 * Service ID[hex]    : None
 *
 * Sync/Async         : Synchronous
 *
 * Reentrancy         : Non reentrant
 *
 * Parameters (in)    : None
 *
 * Parameters (inout) : None
 *
 * Parameters (out)   : None
 *
 * Return value       : return d-cache enable status
 *
 * Description        : return d-cache status
 *
 * \endverbatim
 * Traceability       : SWSR_LIB_014
 *******************************************************************************************************/
MCALLIB_LOCAL uint8 Mcal_CacheStatus(void)
{
    uint32 sctlr;
    sctlr = Mcal_ArchRdSctlr();

    return (uint8)((sctlr >> DCACHE_MASK) & 0x1U);
}
#define MCALLIB_STOP_SEC_CODE
#include "McalLib_MemMap.h"

#ifdef __cplusplus
}
#endif
/* End of file */
